A comparator receives first and second analog signals and produces an output signal according to respective voltage values of the first and second analog signal. The output signal has a first value, such as ‘0’, when the voltage value of the first analog signal is less than the voltage value of the second analog signal. The output signal has a second value, such as ‘1’, when the voltage value of the first analog signal is greater than the voltage value of the second analog signal.
The comparator may perform the comparison of the values of the first and second analog signals at a time determined according to a clock signal, thereby operating as a sampler. Such a comparator may be used, among other applications, in a Serializer/Deserializer (SERDES) receiver circuit or an Analog-to-Digital Converter (ADC) circuit. In addition, the comparator may be used in other applications where digital information needs to be recovered from analog signals, such as memory bit-line detectors and high-speed arbiters.